Memory circuitry and method used in forming memory circuitry

Abstract

A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack extends from a memory-array region into a stair-step region. The stair-step region comprises a flight of stairs extending along a first direction. The first tiers are conductive and the second tiers are insulative at least in a finished-circuitry construction. An anisotropically-etched spacer is formed extending along the first direction directly above the flight of stairs. The anisotropically-etched spacer is used as a mask while etching through one of the first tiers and one of the second tiers in individual of the stairs to form multiple different-depth treads in the individual stairs along a second direction that is orthogonal to the first direction. Individual of the treads comprise conducting material of individual of the first tiers in the finished-circuitry construction. Other aspects, including structure independent of method, are disclosed.