The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Jun. 02, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Hsien-Wei Chen, Hsinchu, TW;

Meng-Liang Lin, Hsinchu, TW;

Shin-Puu Jeng, Po-Shan Village, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/4857 (2013.01); H01L 21/486 (2013.01); H01L 23/49811 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 25/0655 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/5448 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/3512 (2013.01); H01L 2924/37001 (2013.01);
Abstract

An interposer for a semiconductor package and a method of fabricating an interposer including a peripheral metal pad surrounding an alignment mark. The alignment mark and the surrounding peripheral metal pad are formed on a first dielectric material layer of the interposer. A second dielectric material layer is located over the first dielectric material layer and at least partially over the peripheral metal pad structure and includes an recess extending around a periphery of the alignment mark. A third dielectric material layer is located over the second dielectric material layer and extends into the recess and contacts the alignment mark, the first dielectric material layer, and optionally a portion of the peripheral metal pad. The peripheral metal pad may enhance the adhesion between the first, second and third dielectric material layers near the alignment mark structure and thereby reduce the likelihood of crack formation.


Find Patent Forward Citations

Chen, Hsien-Wei. (2025). Interposer structure for semiconductor package including peripheral metal pad around alignment mark and methods of fabricating same (U.S. Patent No. 12368109). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12368109

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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