The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Dec. 14, 2022
Applicant:

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;

Inventors:

Janbo Zhang, Quanzhou, CN;

Yu-Cheng Tung, Quanzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
H10B 12/31 (2023.02); G11C 5/063 (2013.01); H10B 12/0335 (2023.02); H10B 12/34 (2023.02); H10B 12/488 (2023.02);
Abstract

The present disclosure provides a semiconductor memory device and a fabricating method thereof, which includes a substrate, a plurality of buried word lines, and a plurality of storage node contacts. The substrate includes a plurality of active areas and a shallow trench isolation. The buried word lines are embedded in the substrate, across the shallow trench isolation and the active areas. The storage node contacts directly contact the active areas and include a plurality of first plugs, with each first plug including an insulating material and a conductive material stacked sequentially from bottom to top. Within the semiconductor memory device, at least one active area simultaneously contacts two of the first plugs, or a storage node pad physically contacts at least two of the first plugs. Thus, the present disclosure is beneficial on forming the semiconductor memory device with better component reliability.


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