The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Jun. 17, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyojin Yun, Suwon-si, KR;

Seungwon Kim, Hwaseong-si, KR;

Taeyoung Kim, Yongin-si, KR;

Woojung Park, Hwaseong-si, KR;

Jinhye Bae, Suwon-si, KR;

Hyunseop Shin, Yongin-si, KR;

Mintae Lee, Yongin-si, KR;

Hoon Han, Suwon-si, KR;

Moonyoung Kim, Seoul, KR;

Moonchang Kim, Yongin-si, KR;

Cheolmo Yang, Yongin-si, KR;

Yunseok Choi, Yongin-si, KR;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03F 7/42 (2006.01); B08B 3/04 (2006.01); C11D 3/04 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
G03F 7/425 (2013.01); B08B 3/04 (2013.01); C11D 3/044 (2013.01); H01L 21/0206 (2013.01);
Abstract

A photoresist-removing composition includes a polar organic solvent, an alkyl ammonium hydroxide, an aliphatic amine not including a hydroxy group, and a monovalent alcohol. To manufacture a semiconductor device, a photoresist pattern may be formed on a substrate, and the photoresist-removing composition may then be applied to the photoresist pattern. To manufacture a semiconductor package, a photoresist pattern including a plurality of via holes may be formed on a substrate. A plurality of conductive posts including a metal may be formed inside the plurality of via holes, and the photoresist pattern may be removed by applying a photoresist-removing composition of the inventive concept to the photoresist pattern. A semiconductor chip may be adhered to the substrate between the respective conductive posts.


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