Semiconductor chip and semiconductor package

Abstract

A semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips sequentially stacked on the first semiconductor chip, and an insulating adhesive layer between the first semiconductor chip, and each of the plurality of second semiconductor chips, each of the plurality second conductor chips, and the insulating adhesive layer including an adhesive fillet protruding from between at least the first semiconductor chip and each of the plurality of second semiconductor chips, wherein a grooving recess is defined by the first semiconductor chip, the plurality of second semiconductor chips, and the insulating adhesive layer, the grooving recess including a first recess and a second recess adjacent to the first recess, an uppermost surface of the adhesive fillet and the first semiconductor chip defines the first recess, and an uppermost surface of the first semiconductor chip to a surface inside the first semiconductor chip defines the second recess.