The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Feb. 27, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Chen-Hao Huang, Taoyuan, TW;

Sui-Ying Hsu, New Taipei, TW;

YuehYing Lee, Hsinchu, TW;

Chia-Ping Lai, Hsinchu, TW;

Chien-Ying Wu, Hsinchu, TW;

Hau-Yan Lu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); G02B 6/12 (2006.01); G02B 6/136 (2006.01); G02B 6/30 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 21/311 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4248 (2013.01); G02B 6/12 (2013.01); G02B 6/12002 (2013.01); G02B 6/12004 (2013.01); G02B 6/136 (2013.01); G02B 6/4206 (2013.01); G02B 6/4274 (2013.01); H01L 23/5226 (2013.01); H01L 23/53228 (2013.01); G02B 6/30 (2013.01); G02B 6/4228 (2013.01); G02B 6/4236 (2013.01); H01L 21/30604 (2013.01); H01L 21/3065 (2013.01); H01L 21/31116 (2013.01); H01L 23/585 (2013.01);
Abstract

An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.


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