The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Apr. 07, 2023
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Feng-Min Lee, Hsinchu, TW;

Po-Hao Tseng, Taichung, TW;

Yu-Yu Lin, New Taipei, TW;

Ming-Hsiu Lee, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/405 (2006.01); G11C 11/4096 (2006.01); G11C 11/54 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 11/405 (2013.01); G11C 11/54 (2013.01); G11C 16/26 (2013.01);
Abstract

A universal memory for In-Memory Computing and an operation method thereof are provided. The universal memory includes at least one write word line, at least one unit cell and at least one read word line. The unit cell includes a write transistor and a read transistor. The gate of the write transistor is connected to the write word line. The write transistor is a transistor with adjustable threshold voltage. The gate of the read transistor is connected to the drain or the source of the write transistor. The read word line is connected to the drain or the source of the read transistor. The universal memory is used for a training mode and an inference mode. In the training mode and the inference mode, a weight is stored at different locations of the unit cell.


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