The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Nov. 07, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Koichi Motoyama, Clifton Park, NY (US);

Oscar Van Der Straten, Guilderland Center, NY (US);

Joseph F. Maniscalco, Greenville, SC (US);

Chih-Chao Yang, Glenmont, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10N 50/01 (2023.01); H10B 61/00 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10N 50/01 (2023.02); H10B 61/00 (2023.02); H10N 50/80 (2023.02);
Abstract

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A first set of spacers are formed on the sidewalls of a bottom electrode. A reference layer is formed on the spacers and the bottom electrode. A second set of spacers are formed on the sidewalls of the first set of spacers and the reference layer. A tunnel barrier is formed on the reference layer and the second set of spacers. A free layer is formed on the tunnel barrier, where a width of the free layer is greater than a width of the reference layer. A metal hardmask is formed on the free layer. A third set of spacers are formed on the sidewalls of the metal hardmask, the free layer, the tunnel barrier, and the second set of spacers.


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