The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2025
Filed:
Dec. 13, 2024
Applicant:
Invention and Collaboration Laboratory, Inc., Taipei, TW;
Inventor:
Chao-Chun Lu, Hsinchu, TW;
Assignee:
INVENTION AND COLLABORATION LABORATORY, INC., Taipei, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/373 (2006.01); H01L 21/762 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3736 (2013.01); H01L 21/76224 (2013.01); H01L 23/367 (2013.01); H01L 23/49827 (2013.01); H01L 23/481 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06589 (2013.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01);
Abstract
Semiconductor circuit structures with direct die heat removal structure are provided. The semiconductor circuit structure comprises a semiconductor substrate with an original semiconductor surface; a set of active regions within the semiconductor substrate; and a first shallow trench isolation (STI) region neighboring to the set of active regions and extending along a first direction. Wherein the first STI region includes a heat removing layer, and the material of the heat removing layer is different from SiO.