The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Apr. 09, 2021
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/00 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 64/671 (2025.01); H01L 21/02603 (2013.01); H01L 21/30604 (2013.01); H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/021 (2025.01); H10D 62/121 (2025.01); H10D 64/018 (2025.01); H10D 84/85 (2025.01);
Abstract
A device includes a first gate region having a first gate length; a first spacer on a sidewall of the first gate region; a semiconductor layer over the first gate region; a second gate region over the semiconductor layer, wherein the second gate region has a second gate length equal to the first gate length; and a second spacer on a sidewall of second gate region, wherein the second spacer is wider than the first spacer.