The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Dec. 16, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Srinivas V. Pietambaram, Chandler, AZ (US);

Tarek A. Ibrahim, Mesa, AZ (US);

Gang Duan, Chandler, AZ (US);

Sai Vadlamani, Chandler, AZ (US);

Bharat Prasad Penmecha, Phoenix, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 23/49822 (2013.01); H01L 23/49894 (2013.01); H01L 23/5383 (2013.01); H01L 25/0655 (2013.01);
Abstract

Disclosed herein are microelectronic structures including glass cores, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a glass core having through-glass vias (TGVs) therein; a metallization region at a first face of the glass core, wherein a conductive pathway in the first metallization region is conductively coupled to at least one of the TGVs; a bridge component in the metallization region; a first conductive contact at a face of the metallization region, wherein the first conductive contact is conductively coupled to the conductive pathway; and a second conductive contact at the face of the metallization region, wherein the second conductive contact is conductively coupled to the bridge component.


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