The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Mar. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Andy Chih-Hung Wei, Yamhill, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/62 (2025.01); H01L 23/528 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H10D 30/6219 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01);
Abstract

An example IC structure includes a plurality of elongated channel structures (e.g., fins or nanoribbons) and one or more metal gate lines crossing over the fins/nanoribbons. A buried power rail (BPR) is formed between a pair of adjacent fins/nanoribbons. Once a BPR has been formed, an opening is formed above the BPR. The opening has an elongated shape that extends horizontally along the length of the BPR and extends vertically from the top of the BPR to the top of the IC structure, cutting through the metal gate lines. Portions of the opening between cut portions of metal gate lines may be filled with a dielectric material, thus forming metal gate cuts. A portion of the opening that is not between cut portions of a metal gate line is filled with an electrically conductive material and coupled to a source/drain contact of a transistor, thus forming a conductive via.


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