The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2025
Filed:
Aug. 27, 2020
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Edward Fuergut, Dasing, DE;
Philipp Sebastian Koch, Gelugor, MY;
Stephan Pindl, Ergoldsbach, DE;
Hans-Joachim Schulze, Taufkirchen, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/66 (2025.01); H10D 30/01 (2025.01); H10D 62/83 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 30/665 (2025.01); H10D 30/0291 (2025.01); H10D 30/668 (2025.01); H10D 62/8303 (2025.01); H10D 64/513 (2025.01);
Abstract
A power semiconductor device includes a semiconductor body having a front side surface, and a first passivation layer arranged above the front side surface. The first passivation layer is a polycrystalline diamond layer.
Quick Actions:
Fuergut, Edward. (2025). Power semiconductor device and method (U.S. Patent No. 12324186). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12324186
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile