The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

May. 05, 2023
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

Bablu Mukherjee, Nagoya, JP;

René Henricus Jozef Vervuurt, Leuven, BE;

Takayoshi Tsutsumi, Nagoya, JP;

Nobuyoshi Kobayashi, Kawagoe, JP;

Masaru Hori, Nissin, JP;

Assignee:

ASM IP Holding B.V., Almere, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01J 37/32 (2006.01);
U.S. Cl.
CPC ...
H01J 37/32357 (2013.01); H01L 21/31116 (2013.01); H01J 2237/334 (2013.01);
Abstract

The current disclosure relates to methods of selectively etching material from a first surface of a substrate relative to a second surface of the substrate. The method includes providing the substrate having a first surface comprising an etchable material, and a second surface comprising a non-etchable material in a reaction chamber, providing hydrogen-containing plasma into the reaction chamber to reduce the etchable material to a predetermined depth; and providing remotely-generated reactive halogen species and hydrogen into the reaction chamber to selectively etch the reduced etchable material. The disclosure further relates to methods of selectively etching at least two different etchable materials simultaneously from a surface of a substrate relative to a non-etchable material on the same substrate, to methods of simultaneous differential etching of three or more etchable materials on a substrate, as well as to assemblies for processing semiconductor substrates.


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