The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Jun. 04, 2020
Applicant:

Asml Netherlands B.v., Veldhoven, NL;

Inventors:

Maxim Pisarenco, Son en Breugel, NL;

Maurits Van Der Schaar, Eindhoven, NL;

Huaichen Zhang, Eindhoven, NL;

Marie-Claire Van Lare, Utrecht, NL;

Assignee:

ASML NETHERLANDS B.V., Veldhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/00 (2006.01);
U.S. Cl.
CPC ...
G03F 7/705 (2013.01); G03F 7/70633 (2013.01);
Abstract

A method for applying a deposition model in a semiconductor manufacturing process. The method includes predicting a deposition profile of a substrate using the deposition model; and using the predicted deposition profile to enhance a metrology target design. The deposition model can be calibrated using experimental cross-section profile information from a layer of a physical substrate. In some embodiments, the deposition model is a machine-learning model, and calibrating the deposition model includes training the machine-learning model. The metrology target design may include an alignment metrology target design or an overlay metrology target design, for example.


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