The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

May. 26, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yuan-Cheng Yang, Tainan, TW;

Yun-Chi Wu, Tainan, TW;

Tsu-Hsiu Perng, Hsinchu County, TW;

Shih-Jung Tu, Tainan, TW;

Cheng-Bo Shu, Tainan, TW;

Chia-Chen Chang, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/83 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0142 (2025.01); H10D 84/0151 (2025.01); H10D 84/0156 (2025.01); H10D 84/038 (2025.01); H01L 21/26533 (2013.01);
Abstract

A method includes: etching a trench on a surface of a substrate; filling the trench with a dielectric material to form a first isolation region; depositing a patterned mask layer on the substrate, the patterned mask layer comprising an opening exposing the substrate; implanting oxygen into the substrate through the opening to form an implant region; generating a second isolation region from the implant region; and forming a transistor on the substrate. The transistor includes a channel laterally surrounding the second isolation region.


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