The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jul. 28, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chia-Ling Chan, New Taipei, TW;

Liang-Yin Chen, Hsinchu, TW;

Wei-Ting Chien, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/324 (2006.01); H10D 30/01 (2025.01); H10D 30/60 (2025.01); H10D 30/62 (2025.01);
U.S. Cl.
CPC ...
H10D 30/024 (2025.01); H01L 21/02532 (2013.01); H01L 21/26513 (2013.01); H01L 21/30604 (2013.01); H01L 21/308 (2013.01); H01L 21/324 (2013.01); H10D 30/022 (2025.01); H10D 30/608 (2025.01); H10D 30/6217 (2025.01);
Abstract

In an embodiment, a device includes: a fin on a substrate, fin having a Si portion proximate the substrate and a SiGe portion distal the substrate; a gate stack over a channel region of the fin; a source/drain region adjacent the gate stack; a first doped region in the SiGe portion of the fin, the first doped region disposed between the channel region and the source/drain region, the first doped region having a uniform concentration of a dopant; and a second doped region in the SiGe portion of the fin, the second doped region disposed under the source/drain region, the second doped region having a graded concentration of the dopant decreasing in a direction extending from a top of the fin to a bottom of the fin.


Find Patent Forward Citations

Chan, Chia-Ling. (2025). Semiconductor device and method (U.S. Patent No. 12317524). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12317524

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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