The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

May. 09, 2022
Applicant:

Mediatek Inc., Hsinchu, TW;

Inventors:

Yi-Jyun Lee, Hsinchu, TW;

Duen-Yi Ho, Hsinchu, TW;

Hsing-Chih Liu, Hsinchu, TW;

Che-Hung Kuo, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2023.01); H01L 49/02 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/162 (2013.01); H01L 23/49816 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 28/90 (2013.01); H01L 24/16 (2013.01); H01L 2224/16235 (2013.01); H01L 2924/30105 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor die, and a first capacitor. The substrate has a wiring structure. The redistribution layer is disposed over the substrate. The first semiconductor die is disposed over the redistribution layer. The first capacitor is disposed in the substrate and is electrically coupled to the first semiconductor die. The first capacitor includes a first capacitor substrate, a plurality of first capacitor cells, and a first through via. The first capacitor substrate has a first top surface and a first bottom surface. The first capacitor cells are disposed in the first capacitor substrate. The first through via is disposed in the first capacitor substrate and electrically couples the first capacitor cells to the wiring structure on the first top surface and the first bottom surface.


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