The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2025

Filed:

Jun. 19, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jui-Fen Chien, Taichung, TW;

Hsiao-Kuan Wei, Taoyuan County, TW;

Hsien-Ming Lee, Changhua, TW;

Chin-You Hsu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2005.12); H01L 21/28 (2005.12); H01L 27/092 (2005.12); H01L 29/49 (2005.12); H01L 29/66 (2005.12); H01L 29/78 (2005.12); H01L 29/165 (2005.12);
U.S. Cl.
CPC ...
H01L 29/4966 (2012.12); H01L 21/28088 (2012.12); H01L 27/0924 (2012.12); H01L 29/0653 (2012.12); H01L 29/66545 (2012.12); H01L 29/66795 (2012.12); H01L 29/7848 (2012.12); H01L 29/785 (2012.12); H01L 29/165 (2012.12);
Abstract

Provided is a semiconductor device including a first transistor of a first type comprising a first work function layer, the first work function layer comprising a first underlying layer; and a second transistor of the first type comprising a second work function layer, the second work function layer comprising a second underlying layer. The first and second underlying layers each comprises a metal nitride layer with at least two kinds of metals, and a thickness of the first underlying layer is greater than a thickness of the second underlying layer. A method of manufacturing a gate structure for a semiconductor device is also provided.


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