The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2025

Filed:

May. 30, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Meng-Han Lin, Hsinchu, TW;

Chia-En Huang, Xinfeng Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/10 (2005.12); H01L 21/28 (2005.12); H01L 29/423 (2005.12); H01L 29/66 (2005.12); H01L 29/78 (2005.12); H10B 51/10 (2022.12); H10B 51/20 (2022.12); H10B 51/30 (2022.12);
U.S. Cl.
CPC ...
H10B 51/20 (2023.01); H01L 29/40111 (2019.07); H01L 29/42364 (2012.12); H01L 29/42372 (2012.12); H01L 29/6684 (2012.12); H01L 29/78391 (2014.09); H10B 51/10 (2023.01); H10B 51/30 (2023.01);
Abstract

A method of making a semiconductor die includes forming, over a substrate, a stack including insulating layers and sacrificial layers alternatively on top of each other; replacing a portion of first sacrificial layers located in a first portion of the stack to form first gate layers; forming first channel layers extending in a first direction in the first portion; forming first memory layers extending in the first direction in the first portion; replacing a portion of second sacrificial layers located in a second portion of the stack to form second gate layers; forming second channel layers extending in the first direction in the second portion; and forming second memory layers extending in the first direction in the second portion.


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