The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2025
Filed:
Sep. 26, 2022
Applicant:
Sandisk Technologies Llc, Addison, TX (US);
Inventors:
Ramy Nashed Bassely Said, Dublin, CA (US);
Jiahui Yuan, Fremont, CA (US);
Lito De La Rama, San Jose, CA (US);
Assignee:
Sandisk Technologies, Inc., Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2005.12); G06F 3/06 (2005.12); G11C 16/08 (2005.12); G11C 16/14 (2005.12); G11C 16/26 (2005.12); H01L 25/065 (2022.12);
U.S. Cl.
CPC ...
G11C 16/0483 (2012.12); G06F 3/0619 (2012.12); G06F 3/0652 (2012.12); G06F 3/0659 (2012.12); G06F 3/0679 (2012.12); G11C 16/08 (2012.12); G11C 16/14 (2012.12); G11C 16/26 (2012.12); H01L 25/0657 (2012.12); H01L 2225/06562 (2012.12);
Abstract
To reduce data disturbs and lower current requirements of a 3D NAND memory die, a multi-block plane of non-volatile memory cells has its source line separated into multiple source line regions by introduction of isolation trenches. The plane structure for the NAND memory is maintained, but is broken into multi-block sub-planes, each with an independently biasable source line.