The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2025
Filed:
Dec. 27, 2023
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2005.12); H01L 23/00 (2005.12); H01L 23/522 (2005.12); H01L 23/532 (2005.12);
U.S. Cl.
CPC ...
H01L 24/05 (2012.12); H01L 23/5226 (2012.12); H01L 24/03 (2012.12); H01L 23/53228 (2012.12); H01L 23/53257 (2012.12); H01L 2224/02313 (2012.12); H01L 2224/0235 (2012.12); H01L 2224/02372 (2012.12); H01L 2224/02375 (2012.12); H01L 2224/02381 (2012.12); H01L 2224/0239 (2012.12); H01L 2224/024 (2012.12); H01L 2224/0391 (2012.12); H01L 2224/05546 (2012.12); H01L 2224/05624 (2012.12); H01L 2924/1438 (2012.12); H01L 2924/14511 (2012.12);
Abstract
An integrated circuit structure includes an aluminum pad layer on a dielectric stack, a passivation layer covering the aluminum pad layer, and an aluminum shield layer including aluminum routing patterns disposed directly above an embedded memory area and embedded in the dielectric stack. The aluminum shield layer is electrically connected to the uppermost copper layer through a plurality of tungsten vias. The plurality of tungsten vias is embedded in the dielectric stack.