The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

Jul. 30, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yung-Yao Lee, Zhubei, TW;

Cheng-Kang Hu, Kaohsiung, TW;

Jui-Chun Peng, Hsinchu, TW;

Hsu-Shui Liu, Pingjhen, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05B 19/418 (2005.12); G06T 7/13 (2016.12); G06T 7/62 (2016.12);
U.S. Cl.
CPC ...
G05B 19/41875 (2012.12); G06T 7/13 (2016.12); G06T 7/62 (2016.12); G05B 2219/45027 (2012.12); G05B 2219/45028 (2012.12); G05B 2219/45031 (2012.12); G05B 2219/45183 (2012.12); G06T 2207/30148 (2012.12);
Abstract

A cooling controller receives, from one or more sensors, wafer information associated with a wafer. The cooling controller determines a pattern mask area for the wafer based on the wafer information. The cooling controller determines a cooling time for the wafer based on the pattern mask area. The cooling controller causes a cooling plate to cool the wafer for a time duration equal to the cooling time. Determining the cooling time for a wafer based on a pattern mask area provides stable and consistent wafer temperatures for wafers having different mask and layout properties, which reduces mask overlay variation and increases wafer yield.


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