The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Jun. 16, 2022
Applicant:

Zhuhai Access Semiconductor Co., Ltd., Guangdong, CN;

Inventors:

Xianming Chen, Guangdong, CN;

Lei Feng, Guangdong, CN;

Benxia Huang, Guangdong, CN;

Yejie Hong, Guangdong, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2022.12); H01L 21/48 (2005.12); H01L 23/00 (2005.12); H01L 23/053 (2005.12); H01L 23/538 (2005.12);
U.S. Cl.
CPC ...
H01L 25/167 (2012.12); H01L 21/4857 (2012.12); H01L 23/053 (2012.12); H01L 23/5383 (2012.12); H01L 23/5384 (2012.12); H01L 23/5386 (2012.12); H01L 24/29 (2012.12); H01L 24/32 (2012.12); H01L 24/48 (2012.12); H01L 24/73 (2012.12); H01L 24/92 (2012.12); H01L 24/45 (2012.12); H01L 24/85 (2012.12); H01L 2224/29099 (2012.12); H01L 2224/32145 (2012.12); H01L 2224/45144 (2012.12); H01L 2224/45147 (2012.12); H01L 2224/48158 (2012.12); H01L 2224/73265 (2012.12); H01L 2224/85399 (2012.12); H01L 2224/92247 (2012.12);
Abstract

A hybrid embedded packaging structure and a manufacturing method thereof are disclosed. The structure includes: a substrate with a first insulating layer, a conductive copper column, a chip-embedded cavity and a first circuit layer; a first electronic device arranged inside the chip-embedded cavity; a second electronic device arranged on a back surface of the first electronic device; a second insulating layer covering and filling the chip-embedded cavity and an upper layer of the substrate, exposing part of the first circuit layer and a back surface of part of the second electronic device or part of the first electronic device; a second circuit layer electrically connected with the conductive copper column and a terminal of the first electronic device; a conducting wire electrically connecting the first circuit layer with a terminal of the second electronic device; and a protection cover arranged on the top surface of the substrate.


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