The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2025
Filed:
Aug. 27, 2020
Ansys, Inc., Canonsburg, PA (US);
Deqi Zhu, San Jose, CA (US);
Yu Lu, San Ramon, CA (US);
Wei Zhou, Chengdu, CN;
Kunhua Ma, Chengdu, CN;
Norman Chang, Fremont, CA (US);
Prabhas Ranjan Kumar, Fremont, CA (US);
William Alan Mullen, Cupertino, CA (US);
ANSYS, INC., Canonsburg, PA (US);
Abstract
Circuit design techniques can use a trained predictor to predict key dynamic current metrics (such as peak current, peak time, pulse width and total charge) for a gate in a circuit library, where the predictor has been trained over different combinations of different input transition slews and different output fanout models. A dynamic current model solver can be used for a gate in the cell library to derive waveforms (of current versus time) for the different combinations, and a predictor, such as a neural network, can be trained with the outputs from the solver for the different combinations. The trained predictor can be used in a runtime simulation to solve for the dynamic current demand model of the various gates in a circuit design (such as all of the gates in an integrated circuit).