The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2025

Filed:

May. 18, 2023
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Sagheer Ahmad, Cupertino, CA (US);

Jaideep Dastidar, San Jose, CA (US);

Brian C. Gaide, Erie, CO (US);

Juan J. Noguera Serra, San Jose, CA (US);

Ian A. Swarbrick, Santa Clara, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17728 (2020.01); H03K 19/17704 (2020.01); H03K 19/17736 (2020.01);
U.S. Cl.
CPC ...
H03K 19/17728 (2013.01); H03K 19/17736 (2013.01); H03K 19/17712 (2013.01);
Abstract

A System-on-Chip includes a data processing engine array. The data processing engine array includes a plurality of data processing engines organized in a grid. The plurality of data processing engines are partitioned into at least a first partition and a second partition. The first partition includes one or more first data processing engines of the plurality of data processing engines. The second partition includes one or more second data processing engines of the plurality of data processing engines. Each partition is configured to implement an application that executes independently of the other partition.


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