The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2025

Filed:

Mar. 28, 2022
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Elie A. Maalouf, Mesa, AZ (US);

Xu Jason Ma, Chandler, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/30 (2006.01); H03F 1/02 (2006.01); H03F 3/21 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0211 (2013.01); H03F 3/21 (2013.01); H03F 2200/15 (2013.01);
Abstract

A system includes a reference field effect transistor (FET), wherein the reference FET is a depletion mode transistor, and a bias control circuit. The bias control circuit includes a voltage sensor connected to a drain terminal of the reference FET. The voltage sensor is configured to measure a voltage at the drain terminal of the reference FET as a measured voltage, determine a voltage difference between a reference voltage and the measured voltage, and output the voltage difference at a voltage sensor output terminal. The system includes a translation circuit connected the voltage sensor output terminal. The translation circuit is configured to convert the voltage difference into a negative gate bias voltage, and apply the negative gate bias voltage to a gate terminal of the reference FET.


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