The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2025
Filed:
Dec. 08, 2021
Applicant:
Nxp Usa, Inc., Austin, TX (US);
Inventors:
Michael B. Vincent, Chandler, AZ (US);
Scott M. Hayes, Chandler, AZ (US);
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/16 (2023.01); H01L 23/498 (2006.01); H01R 12/57 (2011.01);
U.S. Cl.
CPC ...
H01L 24/24 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 23/315 (2013.01); H01L 24/82 (2013.01); H01L 25/0655 (2013.01); H01L 25/16 (2013.01); H01L 25/50 (2013.01); H01L 23/49827 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/19 (2013.01); H01L 2224/211 (2013.01); H01L 2224/24011 (2013.01); H01L 2224/2402 (2013.01); H01L 2224/24155 (2013.01); H01L 2224/32227 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/82101 (2013.01); H01L 2224/82105 (2013.01); H01L 2224/82951 (2013.01); H01R 12/57 (2013.01);
Abstract
A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and routing structure on a carrier substrate. At least a portion of the semiconductor die and routing structure are encapsulated with an encapsulant. A cavity formed in the encapsulant. A top portion of the routing structure is exposed through the cavity. A conductive trace is formed to interconnect the semiconductor die with the routing structure.