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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12238914 B1

PDFFull Text
Date of Patent:
Feb. 25, 2025

Filed:

Apr. 28, 2023

Heterostructure oxide semiconductor vertical gate-all-around (vgaa) transistor and methods for making the same

Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Gerben Doornbos, Kessel-Lo, BE;

Blandine Duriez, Brussels, BE;

Marcus Johannes Henricus Van Dal, Linden, BE;

Assignee:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Attorney:

The Marbury Law Group, PLLC

Primary Examiner:

Cuong B Nguyen

Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 29/225 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/033 (2023.02); H01L 29/0673 (2013.01); H01L 29/225 (2013.01); H01L 29/66742 (2013.01); H01L 29/785 (2013.01); H01L 29/78642 (2013.01); H01L 29/7869 (2013.01); H01L 29/78696 (2013.01); H10B 12/30 (2023.02); H10B 12/315 (2023.02); H10B 12/482 (2023.02); H01L 2029/7858 (2013.01);
Abstract

A method of forming a semiconductor device includes forming a contact metal layer, forming a channel structure on the contact metal layer, wherein the channel structure comprises a first source/drain region, a channel region and a second source/drain region stacked in that order, and forming a gate structure around the channel region, such that an upper surface of the gate structure is substantially coplanar with an upper surface of the channel structure.

Find Patent Forward Citations

Doornbos, Gerben. (2025). Heterostructure oxide semiconductor vertical gate-all-around (vgaa) transistor and methods for making the same (U.S. Patent No. 12238914). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12238914

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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