The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2025

Filed:

Oct. 16, 2023
Applicant:

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;

Inventors:

Huixian Lai, Quanzhou, CN;

Yu Cheng Tung, Quanzhou, CN;

Chao-Wei Lin, Quanzhou, CN;

Chiayi Chu, Quanzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01);
Abstract

A semiconductor device includes a substrate; at least one trench located at a top surface of the substrate; and a first dielectric layer, a second dielectric layer and a third dielectric layer that are sequentially stacked on an inner wall of each of the at least one trench. A topmost surface of the first dielectric layer is lower than a topmost surface of the second dielectric layer and the top surface of the substrate, to form a first groove between the second dielectric layer and the substrate. An edge corner between the top surface of the substrate and the inner wall of each of the at least one trench is in a shape of a fillet curve. The fillet structure is smooth and round without a sharp corner, reducing point discharge and improving reliability of the shallow trench isolation structure.


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