The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2025
Filed:
May. 26, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
National Taiwan University, Taipei, TW;
National Taiwan Normal University, Taipei, TW;
Tung-Ying Lee, Hsinchu, TW;
Tse-An Chen, Taoyuan, TW;
Tzu-Chung Wang, Hsinchu, TW;
Miin-Jang Chen, Taipei, TW;
Yu-Tung Yin, Taipei, TW;
Meng-Chien Yang, Taoyuan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
NATIONAL TAIWAN UNIVERSITY, Hsinchu, TW;
NATIONAL TAIWAN NORMAL UNIVERSITY, Taipei, TW;
Abstract
A semiconductor device includes a plurality of semiconductor layers arranged one above another, and source/drain epitaxial regions on opposite sides of the plurality of semiconductor layers. The semiconductor device further includes a gate structure surrounding each of the plurality of semiconductor layers. The gate structure includes interfacial layers respectively over the plurality of semiconductor layers, a high-k dielectric layer over the interfacial layers, and a gate metal over the high-k dielectric layer. The gate structure further includes gate spacers spacing apart the gate structure from the source/drain epitaxial regions. A top position of the high-k dielectric layer is lower than top positions of the gate spacers.