The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Apr. 08, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Anurag Verma, Hsinchu, TW;

Meng-Kai Hsu, Hsinchu County, TW;

Chih-Wei Chang, Hsinchu, TW;

Sang-Chi Huang, Hsinchu, TW;

Wei-Ling Chang, Hsinchu, TW;

Hui-Zhong Zhuang, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3953 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
G06F 30/3953 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); H01L 23/5226 (2013.01); H01L 23/5286 (2013.01); H01L 27/088 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/41733 (2013.01); H01L 29/41775 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01);
Abstract

A layout method and a semiconductor device are disclosed. The layout method includes: generating a design layout by placing a cell, wherein the cell includes: a first conductive segment overlapping a source/drain region and disposed immediately adjacent to a first power rail, wherein the first conductive segment has a length substantially equal to a cell length; a second conductive segment; and a third conductive segment between the first and second conductive segments. The layout method further includes: providing a fourth conductive segment and a fifth conductive segment to the design layout, wherein the fourth and fifth conductive segments are aligned in a first direction.


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