The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Jun. 15, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Gongyi Wu, Hefei, CN;

Yong Lu, Hefei, CN;

Xin Xin, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/762 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H10B 12/488 (2023.02); H01L 21/76224 (2013.01); H01L 23/5283 (2013.01); H01L 23/53271 (2013.01); H01L 29/0607 (2013.01); H01L 29/0847 (2013.01); H10B 12/053 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02); H10B 12/485 (2023.02);
Abstract

The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.


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