The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Apr. 05, 2023
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Ivan Nikitin, Regensburg, DE;

Thorsten Scharf, Lappersdorf, DE;

Marco Bäßler, Oeversee, DE;

Andreas Grassmann, Regensburg, DE;

Waldemar Jakobi, Soest, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/07 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 25/072 (2013.01); H01L 23/4952 (2013.01); H01L 23/49537 (2013.01); H01L 23/49575 (2013.01); H01L 23/49811 (2013.01); H01L 23/49833 (2013.01); H01L 23/3121 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/49175 (2013.01);
Abstract

A power semiconductor package includes first power semiconductor dies attached to a metallization layer of at least one first power electronics carrier and second power semiconductor dies attached to a metallization layer of at least one second power electronics carrier. A first lead frame includes a first structured metal frame electrically connected to a load terminal of each first power semiconductor die, and a second structured metal frame electrically connected to a load terminal of each second power semiconductor die and to the metallization layer of the first power electronics carrier. A second lead frame above the first lead frame includes first and second leads electrically connected to the metallization layer of the second power electronics carrier, a third lead between the first and second leads and electrically connected to the first structured metal frame, and a fourth lead electrically connected to the second structured metal frame.


Find Patent Forward Citations

Nikitin, Ivan. (2025). Power semiconductor package having first and second lead frames (U.S. Patent No. 12211824). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12211824

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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