The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Aug. 22, 2023
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Hans-Joachim Schulze, Taufkirchen, DE;

Alexander Breymesser, Villach, AT;

Bernhard Goller, Villach, AT;

Matthias Kuenle, Villach, AT;

Helmut Oefner, Zorneding, DE;

Francisco Javier Santos Rodriguez, Villach, AT;

Stephan Voss, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/324 (2006.01); H01L 21/265 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3247 (2013.01); H01L 21/26506 (2013.01); H01L 21/7806 (2013.01);
Abstract

A method of forming a semiconductor device includes: forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate; increasing the porosity of the first semiconductor layer; first annealing the first semiconductor layer in an atmosphere including an inert gas; forming a second semiconductor layer on the first semiconductor layer; and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer. Additional methods of forming a semiconductor device are described.


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