The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Mar. 31, 2024
Applicant:

Innoscience (Zhuhai) Technology Co., Ltd., Zhuhai, CN;

Inventors:

Hang Liao, Zhuhai, CN;

Qingyuan He, Zhuhai, CN;

Chunhua Zhou, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01C 7/02 (2006.01); H01C 7/04 (2006.01); H01C 17/00 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 23/34 (2013.01); H01C 7/02 (2013.01); H01C 7/04 (2013.01); H01C 17/00 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01);
Abstract

The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first electrode, a second electrode, a gate structure and a temperature sensitive component. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap greater than that of the first nitride semiconductor layer. The first electrode is disposed on the second nitride semiconductor layer. The second electrode is disposed on the second nitride semiconductor layer. The gate structure is disposed on the second nitride semiconductor layer and between the first electrode and the second electrode. The temperature sensitive component is disposed external to a region between the gate structure and the first electrode along a first direction in parallel to an interface of the first nitride semiconductor layer and the second nitride semiconductor layer.


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