The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Apr. 27, 2022
Applicant:

Ibiden Co., Ltd., Gifu, JP;

Inventors:

Tomoyuki Ikeda, Ogaki, JP;

Kentaro Wada, Ogaki, JP;

Assignee:

IBIDEN CO., LTD., Ogaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/40 (2006.01);
U.S. Cl.
CPC ...
H05K 1/112 (2013.01); H05K 1/183 (2013.01); H05K 1/185 (2013.01); H05K 3/4007 (2013.01); H05K 3/4038 (2013.01); H05K 1/111 (2013.01); H05K 2201/096 (2013.01);
Abstract

A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.


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