The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2025
Filed:
Jan. 10, 2023
Nanjing University of Posts and Telecommunications, Jiangsu, CN;
Nantong Institute of Nanjing University of Posts and Telecommunications Co., Ltd., Jiangsu, CN;
Zhikuang Cai, Jiangsu, CN;
Guopeng Zhou, Jiangsu, CN;
Haijun Shen, Jiangsu, CN;
Binbin Xu, Jiangsu, CN;
Jiafei Yao, Jiangsu, CN;
Henglu Wang, Jiangsu, CN;
Zushuai Xie, Jiangsu, CN;
Jian Xiao, Jiangsu, CN;
Zixuan Wang, Jiangsu, CN;
Yufeng Guo, Jiangsu, CN;
Abstract
A circuit for post-binding testing of a 2.5D chiplet includes an interposer-dedicated TAP controller, an interposer test interface circuit and a chiplet test output control circuit. A chiplet test configuration register and its corresponding instructions are newly added for the interposer-dedicated TAP controller. The interposer test interface circuit uses an output control signal of the chiplet test configuration register to select the opening or closing of a test signal channel between an interposer and a chiplet. The chiplet test output control circuit uses the chiplet test configuration register to output a control signal for control of a test data output of the chiplet on the interposer.