The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Jun. 23, 2023
Applicant:

Semiconductor Components Industries, Llc, Scottsdale, AZ (US);

Inventors:

Peter Moens, Erwetegem, BE;

Gordon M. Grivna, Mesa, AZ (US);

Yusheng Lin, Phoenix, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 25/07 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/76224 (2013.01); H01L 25/071 (2013.01); H01L 29/2003 (2013.01);
Abstract

In a general aspect, a semiconductor device assembly includes a first portion of a semiconductor substrate; a second portion of the semiconductor substrate, and a semiconductor device layer disposed on the first portion of the semiconductor substrate and the second portion of the semiconductor substrate. The semiconductor device layer includes a first semiconductor device disposed on the first portion of the semiconductor substrate, and a second semiconductor device disposed on the second portion of the semiconductor substrate. The assembly also includes an isolation trench defined in the semiconductor substrate that has a dielectric material disposed therein. The isolation trench is disposed between the first portion of the semiconductor substrate and the second portion of the semiconductor substrate, and electrically isolates the first portion of the semiconductor substrate from the second portion of the semiconductor substrate. The semiconductor device layer excludes the isolation trench.


Find Patent Forward Citations

Loading…