The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Mar. 13, 2019
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Rahul Agarwal, Livermore, CA (US);

Chia-Hao Cheng, Hsinchu, TW;

Milind S. Bhagavat, Los Altos, CA (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/565 (2013.01); H01L 23/3128 (2013.01); H01L 23/5226 (2013.01); H01L 24/17 (2013.01); H01L 25/0655 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01); H01L 2924/3511 (2013.01);
Abstract

Various molded fan-out semiconductor chip devices are disclosed. In one aspect, a semiconductor chip device is provided that includes a first molding layer that has internal conductor structures, a redistribution layer (RDL) structure positioned on the first molding layer and electrically connected to the internal conductor structures, a semiconductor chip positioned on and electrically connected to the RDL structure, and a second molding layer positioned on the RDL structure and at least partially encapsulating the semiconductor chip.


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