The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Sep. 16, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Kui Zhang, Hefei, CN;

Zhan Ying, Hefei, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 21/3213 (2006.01); H10B 12/00 (2023.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3086 (2013.01); H01L 21/32139 (2013.01); H10B 12/482 (2023.02); H10B 12/485 (2023.02); H01L 21/0272 (2013.01);
Abstract

Provided is a manufacturing method of a semiconductor structure, including: providing a substrate; forming a first mask layer having a first mask pattern on the substrate, and etching the substrate by using the first mask layer as a mask to form active regions; forming several discrete bitlines on the active regions; forming a sacrificial layer between adjacent bitlines; forming a second mask layer having a second mask pattern on the sacrificial layer, the first mask pattern and the second mask pattern being complementary to each other; and etching the sacrificial layer by using the second mask layer and the bitlines as masks to form a plurality of contact structures. The embodiment of the present disclosure is beneficial to reducing the manufacturing cost of the semiconductor structure.


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