The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 2024
Filed:
Jul. 22, 2021
Teradyne (Asia) Pte. Ltd., Singapore, SG;
Min Nie, Shanghai, CN;
Yi Hou, Shanghai, CN;
Siqiang Jia, Shanghai, CN;
Yang Xu, Shanghai, CN;
Jun Tang, Shanghai, CN;
Yongpeng Mu, Shanghai, CN;
Jun Liu, Shanghai, CN;
Bo Yu, Shanghai, CN;
Teradyne (Asia) Pte. Ltd., Singapore, SG;
Abstract
Device under test (DUT) simulation equipment includes: a first circuit board including a first field programmable gate array (FPGA); a second circuit board including a processor; and a power distribution board, wherein the first circuit board is connected to the power distribution board, and the power of the first circuit board is supplied by the power distribution board, wherein the second circuit board is connected to the power distribution board, and the power of the second circuit board is supplied by the power distribution board, wherein when the DUT simulation equipment is connected to a tester to perform testing, the DUT simulation equipment simulates the performance of a DUT providing a response signal after receiving a test signal from the tester, and wherein, in the DUT simulation equipment, only the first circuit board receives the test signal from the tester, and the second circuit board controls the first circuit board by means of a control signal.