The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Aug. 26, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Daniel Billingsley, Meridian, ID (US);

Matthew J. King, Boise, ID (US);

Jordan D. Greenlee, Boise, ID (US);

Yongjun J. Hu, Boise, ID (US);

Tom George, Boise, ID (US);

Amritesh Rai, Boise, ID (US);

Sidhartha Gupta, Boise, ID (US);

Kyle A. Ritter, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/30 (2023.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H10B 41/27 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/30 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H01L 29/495 (2013.01); H10B 41/27 (2023.02); H10B 41/30 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/30 (2023.02);
Abstract

A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.


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