The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Jan. 12, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chun Hsiung Tsai, Xinpu Township, TW;

Chih-Hsin Ko, Fongshan, TW;

Clement Hsing Jen Wann, Carmel, NY (US);

Ya-Yun Cheng, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0653 (2013.01); H01L 29/66553 (2013.01); H01L 29/66568 (2013.01); H01L 21/26513 (2013.01); H01L 21/30604 (2013.01); H01L 21/3065 (2013.01);
Abstract

A semiconductor device including a FET includes an isolation insulating layer disposed in a trench of the substrate, a gate dielectric layer disposed over a channel region of the substrate, a gate electrode disposed over the gate dielectric layer, a source and a drain disposed adjacent to the channel region, and an embedded insulating layer disposed below the source, the drain and the gate electrode and both ends of the embedded insulating layer are connected to the isolation insulating layer.


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