The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

Feb. 14, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Jingwen Lu, Hefei, CN;

Bingyu Zhu, Hefei, CN;

Zhaopei Cui, Hefei, CN;

Wei Feng, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H01L 21/3086 (2013.01); H10B 12/482 (2023.02); H10B 12/488 (2023.02); H01L 21/3088 (2013.01);
Abstract

A forming method of a semiconductor structure includes the following: providing a semiconductor substrate formed with a first mask layer having a preset pattern; forming a second mask layer having a first mask pattern on a surface of the first mask layer, wherein the first mask pattern includes a plurality of first sub-patterns arranged in sequence; forming a second mask pattern in the second mask layer through the first mask pattern in a self-alignment manner, wherein the second mask pattern includes the first sub-patterns of the first mask pattern and second sub-patterns corresponding to the first sub-patterns; etching the first mask layer based on the first sub-patterns and the second sub-patterns of the second mask pattern to convert the preset pattern into an active area pattern; and defining active areas in the semiconductor substrate based on the active area pattern.


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