The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Sep. 23, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Benjamin Duong, Phoenix, AZ (US);

Roy Dittler, Chandler, AZ (US);

Darko Grujicic, Chandler, AZ (US);

Chandrasekharan Nair, Chandler, AZ (US);

Rengarajan Shanmugam, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01F 27/24 (2006.01); H01F 27/28 (2006.01); H01F 27/32 (2006.01); H01L 23/64 (2006.01);
U.S. Cl.
CPC ...
H01L 23/645 (2013.01); H01F 27/24 (2013.01); H01F 27/2804 (2013.01); H01F 27/324 (2013.01);
Abstract

An electronic substrate may be fabricated by forming a base substrate and forming an inductor extending through the base substrate, wherein the inductor includes a magnetic material layer and a barrier layer, such that the barrier layer prevents the magnetic material layer from leaching into plating solutions during the fabrication of the electronic substrate. In one embodiment, the barrier material may comprise titanium. In another embodiment, the barrier layer may comprise a polymeric material. In still another embodiment, the barrier layer may comprise a nitride material layer. The inductor may further include a plating seed layer on the barrier layer and a conductive fill material abutting the plating seed layer.


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