The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Jun. 29, 2022
Applicant:

Stmicroelectronics International N.v., Geneva, CH;

Inventors:

Praveen Kumar Verma, Greater Noida, IN;

Promod Kumar, Greater Noida, IN;

Harsh Rawat, Faridabad, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/20 (2006.01); G11C 11/418 (2006.01);
U.S. Cl.
CPC ...
G11C 8/20 (2013.01); G11C 11/418 (2013.01);
Abstract

A method of corrupting contents of a memory array includes asserting a signal at a reset node to thereby cause starving of current supply to the memory array, and selecting bit lines and complementary bit lines associated with desired columns of the memory array that contain memory cells to have their contents corrupted. For each desired column, a logic state of its bit line and complementary bit line are forced to a same logic state. Each word line associated with desired rows of the memory array that contains memory cells to have their contents corrupted is simultaneously asserted, and then simultaneously deasserted to thereby place each memory cell to have its contents corrupted into a metastable state during a single clock cycle.


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