The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Jun. 29, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Christopher John Kawamura, Boise, ID (US);

Scott James Derner, Boise, ID (US);

Charles L. Ingalls, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 11/20 (2006.01); G11C 11/22 (2006.01); G11C 29/12 (2006.01); G11C 29/36 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01); G06F 11/10 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2094 (2013.01); G06F 11/14 (2013.01); G11C 11/221 (2013.01); G11C 11/2255 (2013.01); G11C 11/2257 (2013.01); G11C 11/2273 (2013.01); G11C 11/2275 (2013.01); G11C 29/1201 (2013.01); G11C 29/36 (2013.01); G11C 29/4401 (2013.01); G11C 29/52 (2013.01); G06F 11/1068 (2013.01); G06F 2201/805 (2013.01); G11C 2029/3602 (2013.01); G11C 29/42 (2013.01); G11C 2029/4402 (2013.01);
Abstract

Methods, systems, and apparatuses for storing operational information related to operation of a non-volatile array are described. For example, the operational information may be stored in a in a subarray of a memory array for use in analyzing errors in the operation of memory array. In some examples, an array driver may be located between a command decoder and a memory array. The array driver may receive a signal pattern used to execute an access instruction for accessing non-volatile memory cells of a memory array and may access the first set of non-volatile memory cells according to the signal pattern. The array driver may also store the access instruction (e.g., the binary representation of the access instruction) at a non-volatile subarray of the memory array.


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