The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Jan. 03, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Sameer Chhajed, Boise, ID (US);

Ashonita A. Chavan, Boise, ID (US);

Mark Fischer, Meridian, ID (US);

Durai Vishak Nirmal Ramaswamy, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 53/30 (2023.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 49/02 (2006.01); H10B 12/00 (2023.01); H10B 53/10 (2023.01);
U.S. Cl.
CPC ...
H10B 53/30 (2023.02); H01L 28/60 (2013.01); H01L 28/91 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01); H10B 12/033 (2023.02); H10B 12/053 (2023.02); H10B 12/312 (2023.02); H10B 12/34 (2023.02); H10B 12/395 (2023.02); H10B 53/10 (2023.02);
Abstract

A method of forming an array of capacitors comprises forming a plurality of horizontally-spaced groups that individually comprise a plurality of horizontally-spaced lower capacitor electrodes having a capacitor insulator thereover. Adjacent of the groups are horizontally spaced farther apart than are adjacent of the lower capacitor electrodes within the groups. A void space is between the adjacent groups. An upper capacitor electrode material is formed in the void space and in the groups over the capacitor insulator and the lower capacitor electrodes. The upper capacitor electrode material in the void space connects the upper capacitor electrode material that is in the adjacent groups relative to one another. The upper capacitor electrode material less-than-fills the void space. At least a portion of the upper capacitor electrode material is removed from the void space to disconnect the upper capacitor electrode material in the adjacent groups from being connected relative to one another. A horizontally-elongated conductive line is formed atop and is directly electrically coupled to the upper capacitor electrode material in individual of the groups. Other methods, including structure independent of method of manufacture, are disclosed.


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