The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Oct. 17, 2023
Applicant:

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;

Inventors:

Janbo Zhang, Quanzhou, CN;

Yu-Cheng Tung, Quanzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/08 (2006.01); G11C 5/06 (2006.01); H01L 21/762 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/31 (2023.02); G11C 5/063 (2013.01); H01L 21/76224 (2013.01); H10B 12/482 (2023.02); H10B 12/485 (2023.02); H10B 12/488 (2023.02);
Abstract

A semiconductor memory device includes a substrate, at least one word line, a plurality of bit lines and a plurality of insulating structures. The word line is disposed in the substrate, extends along a first direction, and includes a gate cap layer. The bit lines are disposed on the substrate and respectively extend along a second direction. The bit line crosses the word line, and includes a conductive layer. The insulating structures are disposed on the word line and respectively disposed between the bit lines. The bottom surface of the insulating structure is located in the gate cap layer. The area of the top surface of the insulating structure is larger than the area of the bottom surface of the insulating structure.


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